CHS-T5ASIC10G-SO-00
MPN: T5ASIC10G-SO

Chelsio T5ASIC10G-SO T5 Server Offload Engine - 4x10Gb Ports w/ Stateless Offload Only

Highlights

40 Gigabit Ethernet (40GbE) iWARP RDMA,iSCSI,TOE,FCoE, NIC Engine

The Terminator 5 (T5) is Chelsio's fifth generation ASIC. A highly integrated, hyper-virtualized 10Gb Ethernet (10GbE)/40Gb Ethernet (40GbE) controller, the Terminator 5 (T5) is built around a programmable protocol-processing engine, with full offload of a complete Unified Wire solution comprising NIC, TOE, iWARP RDMA, iSCSI, FCoE and NAT support. The Terminator 5 (T5) provides no-compromise performance with both low latency (1usec through hardware) and high bandwidth, limited only by the PCI bus. Furthermore, it scales true 40Gb line rate operation from a single TCP connection to thousands of connections, and allows simultaneous low latency and high bandwidth operation thanks to multiple physical channels through the ASIC.

Designed for high performance clustering, storage and data networks, the Terminator 5 (T5) enables fabric consolidation by simultaneously supporting wire-speed TCP/IP and UDP/IP socket applications, RDMA applications and SCSI applications, thereby allowing InfiniBand and FibreChannel applications to run unmodified over standard Ethernet. The API used for the complete software suite (on Linux, Windows and FSBD) for current Terminator 4 (T4) installations is the same for the Terminator 5 (T5) chip and future 100Gb capable versions, leveraging all the software investment that has been made in Terminator 4 (T4) deployments.

The T5 ASIC is built around a highly scalable and programmable protocol-processing engine. Much of the processing of the offloaded protocols is implemented in microcode running on a pipelined proprietary data-flow engine. The pipeline supports cut-through operation for both transmit and receive paths for minimum latency. The transport processor is designed for wire-speed operation at small packet sizes, regardless of the number of TCP connections.

Some key features of the T5:

  • Integrated PCI Express v3.0 x8 host interface
  • 2xDDR-3 memory interfaces
  • 4x100M/1G/10G or 2x40G ports
  • Designed for very low latency, highbandwidth and high packet processing rate
  • NIC/TOE/iWARP RDMA/iSCSI/FCoE/NAT offload
  • TOE/iWARP RDMA/iSCSI/FCoE port to port, and adapter to adapter failover
  • SR-IOV 8PF/128VF + VEPA/VEB 802.1Qbg/h offload virtualization
  • Integrated OpenFlow ready virtual Ethernet switch
  • T10-DIF/DIX protection support for both FCoE and iSCSI

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Specifications